NANO-TEC at DATE 2012

Printer-friendly versionSend by emailPDF version

Embedded Tutorial on "Beyond CMOS - Benchmarking for Future Technologies" at DATE12

For the download of the slides see below.

Plenum DATE 2012

At this year's Design Automation and Test Concerence in Europe, the NANO-TEC project presented its current status and achievements. In an Embedded Tutorial in the Special Session 2.8. entitled "Beyond CMOS - Benchmarking for Future Technologies" some of the project partners introduced NANO-TEC to about 50 attendants from the design community.

Clivia M Sotomayor Torres
Catalan Institute of Nanotechnology,
Barcelona, Spain,
Coordinator of NANOTEC
introduced the session
Wolfgang Rosenstiel
University of Tübingen and edacentrum,
Germany
and General Chair of DATE 2012
co-moderated the discussion

Of key importance is to address the technological challenges posed by the emerging nanoelectronic concepts, of which a selection will be presented within the tutorial. After an overview on emerging technologies and their design aspects the embedded tutorial will present first benchmarking results for beyond CMOS technologies. Parameters to be considered include gain, signal/noise ration, non-linearity, speed, power consumption, architecture and integrability, efficiency, tolerances and manufacturability as well as the timeline of each potential technology.

___________________________________________________________________________________________________

Presentations

"EMERGING TECHNOLOGIES:
MORE MOORE AND MORE THAN MOORE"

M Graef, Delft TU, NL

"TECHNOLOGY AND DESIGN CHALLENGES IN
 FUTURE LOW POWER MEMORY DEVICES "
AND CIRCUITS
P Fantini, Micron Semiconductors, IT

___________________________________________________________________________________________________

"BRIDGING TECHNOLOGY AND DESIGN
FOR BEYOND CMOS"

P Lugli, Munich TU, DE
Beside Clivia M Sotomayor Torres,
DATE12 General Chair Wolggang Rosenstiel
from the University of Tübingen and from
edacentrum moderated the session leading
through an interesting discussion.

___________________________________________________________________________________________________

"BRIDGING TECHNOLOGY AND DESIGN
IN MORE THAN MOORE"

W. Grabinski, EPF Lausanne, CH
"BENCHMARKING
FOR BEYOND CMOS TECHNOLOGIES"

J Ahopelto, VTT, FI