The NANO-TEC project consortia has finalized its "Recommendations on Beyond CMOS Nanoelectronics Research" based on presentations and discussions during the workshop series held between January 2011 and November 2012. It is anchored in the grand technological challenges in information processing, communications, based on memory and logic devices, circuits and architectures with a view to the time when CMOS scaling begins to loose some of its advantages over emerging nanoelectronic technologies.
This report is available here as a PDF.
The document is divided into five subcategories, covering: charge-based state variables, non-charge based state variables, new computing paradigms, ecosystem technology in Europe and progress in bridging the gap between technology and design.
Everybody is invited to give (a) critical comments and (b) suggestions for specific dissemination beyond the ENIAC/CATRENE, Sinano, the USA SRC, the IPWGN, etc. This can be done using our discussion forum on the report.