Events

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During the life-time of the NANO-TEC project (2010-2013) four Workshops will be organised as part of the NANO-TEC project strategy to reach its aim of identifying the next generation of emerging device concepts and technologies. For registration at workshop 3 please go here.

In the project NANO-TEC, the relationship between technology and design in nanoelectronics is seen as a mutually dependent two-block partnership. One could start by considering a function of relevance to Beyond CMOS, which comes out of the myriad of possibilities arising from the fast progress in material sciences, coupled to developments in the control of morphology and or the nanostructuring of these materials. Then a crucial next step is to find a way to link this function to an established, or a new, logic. For this logic to work, ideas on design and architecture are needed. In this basic frame of analysis, design plays a key enabling role in the latter two steps, as well as in the consideration of the way the information-related function, based on the properties of these new materials and (nano) structures, is linked to a logic system.

The 4th NANO-TEC workshop will be held in Autumn 2012. The Programme is not fixed yet.

  The 3rd NANO-TEC workshop “SWOT Analysis of the Technology-Design Ecosystem” will be held in Lausanne, Switzerland May 30-31, 2012. will take place in the End of May in Lausanne, Switzerland. The program can be found here. It includes a series of plenary presentations on several selected technologies, followed by a panel discussion on the programmatic and explorative perspectives of these technologies in which the results of the SWOT analysis will be assesed.

 

 

The 2nd NANO-TEC workshop “Benchmarking of new beyond CMOS device/design concepts” was held in
Athens, Greece October 13-14, 2011. Following the outcome and recommendations of the 1st workshop, the topics for the 2nd workshop were selected and the focus was more on devices than on technology. To reach some level of comparability and to empower the discussion on the relevant design related issues, guidelines were provided in advance to the speakers, discussants and rapporteurs. The aim of this workshop was to shed light on the potential of the technologies claimed for the “Beyond CMOS” era. The aim was not to directly compare, to “benchmark”, the performance of the emerging devices against the current state-of- the-art CMOS devices. It was rather more like mapping and identifying the potential for future ICT applications, bearing in mind that some relevant properties are required to be fulfilled. The challenges included, among others, power consumption, speed, integration prospects, flexibility for new architectures and manufacturability. A Table was used for summing up the relevant properties of the emerging technology. Personal opinions and institutional views have been encouraged. (The Presentations can be found here).

The 1st NANO-TEC workshop entitled "Identification of the main requirements for future ICT Devices", was held in Granada, Spain from 20 to 21 January 2011 with over 70 participants from academia, research organisations and industry. The workshop methodology was based on invited speakers on selected subjects, discussions and reports on each session. A strategy was followed of first looking at the global nanoelectronics perspective based on a thorough exercise carried out by the USA National Science Foundation and the Semiconductor Research Council (SRC) in 2010 in which senior researchers from the USA, EU and Asia were involved. This was followed by critical presentations on technology addressing carbon- and silicon-based electronics, compound semiconductor based opto- and nano-electronics, spintronics and magneto electronics, molecular electronics and quantum computing. Concerning design, two presentations were given, one on analog mixed design and an overview of the issues needed attention in order to build the bridge between technology and design. Open and frank discussions were facilitated by a discussant and records kept by a rapporteur for each session.  (The Presentations can be found here).